[MLton-devel] preload instructions

[Henry Cejtin]

Isn't the fancy cache on the Mips CPU?  I remember that that was the only
machine where it would keep track of which parts of the cache had been
written but not yet read.  That, along with their stack-in-heap strategy,
is why they suffered so much when they went to the alpha, and why the
pre-load on that machine bought so much.

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